| dc.contributor.author | Sootkaneung, Warin | |
| dc.date.accessioned | 2010-03-01T15:59:20Z | |
| dc.date.available | 2010-03-01T15:59:20Z | |
| dc.date.issued | 2005 | |
| dc.identifier.citation | ICICS 2005 : 559 - 563 | en_US |
| dc.identifier.uri | http://repository.rmutp.ac.th/handle/123456789/348 | |
| dc.description | This article describes an efficient approach to the implementation of bit-serial lattice wave digital filters based on field programmable gate array (FPGA). | en_US |
| dc.description.abstract | This article describes an efficient approach to the implementation of bit-serial lattice wave digital filters based on field programmable gate array (FPGA). In this paper, a time schedule of all of the bit-serial two-port adaptors is presented as a bridge between conception and completion. Finally, with the satisfying frequency response, the filter is successfully tested by both computer simulation and real signal measured from the programmed FPGA. | en_US |
| dc.language.iso | en | en_US |
| dc.publisher | IEEE ICICS 2005 | en_US |
| dc.subject | lattice wave digital filters | en_US |
| dc.subject | bit-serial | en_US |
| dc.subject | two-port adaptors | en_US |
| dc.subject | field programmable gate array (FPGA) | en_US |
| dc.title | The Design of Bit-Serial Lattice Wave Digital Filter Using FPGA | en_US |
| dc.type | Journal Articles | en_US |
| dc.contributor.emailauthor | [email protected] | en_US |
| dc.contributor.emailauthor | [email protected] | |
